Difference between revisions of "STM32F107VC/Interrupts and Events"

From Teknologisk videncenter
Jump to: navigation, search
m (→‎Example using USART2 interrupt)
m (→‎Example using USART2 interrupt)
 
(One intermediate revision by the same user not shown)
Line 9: Line 9:
 
*Implementation of System Control Registers
 
*Implementation of System Control Registers
 
=Example using USART2 interrupt=
 
=Example using USART2 interrupt=
−
From the [[http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/CD00171190.pdf Reference manual]] table 61 in section 10.1.2 its seen that
+
From the [http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/CD00171190.pdf Reference manual] table 61 in section 10.1.2 its seen that
 
;USART2 global interrupt
 
;USART2 global interrupt
 
:Position: '''28'''
 
:Position: '''28'''
Line 15: Line 15:
 
:Address: '''0x0000_00D8'''
 
:Address: '''0x0000_00D8'''
  
 +
=Default Setup=
 +
The default Keil uVision [[STM32F107VC]] startup file ''startup_stm32f10x_cl.s'' contains the startup code and the Interrupt entries. Partial config below.
 +
<source lang=asm>
 +
Stack_Size      EQU    0x00000200
 +
 +
                AREA    STACK, NOINIT, READWRITE, ALIGN=3
 +
Stack_Mem      SPACE  Stack_Size
 +
__initial_sp
 +
                AREA    RESET, DATA, READONLY
 +
                EXPORT  __Vectors
 +
                EXPORT  __Vectors_End
 +
                EXPORT  __Vectors_Size
 +
 +
__Vectors      DCD    __initial_sp              ; Top of Stack  (Linker puts top-of-stack address in location 0x00000000)
 +
                DCD    Reset_Handler            ; Reset Handler (Vector address of Reset. The PC - Program Counter - loads this address on Reset
 +
                DCD    NMI_Handler              ; NMI Handler
 +
                DCD    HardFault_Handler        ; Hard Fault Handler
 +
                DCD    MemManage_Handler        ; MPU Fault Handler
 +
                DCD    BusFault_Handler          ; Bus Fault Handler
 +
                DCD    UsageFault_Handler        ; Usage Fault Handler
 +
                DCD    0                        ; Reserved
 +
                DCD    0                        ; Reserved
 +
                DCD    0                        ; Reserved
 +
                DCD    0                        ; Reserved
 +
                DCD    SVC_Handler              ; SVCall Handler
 +
                DCD    DebugMon_Handler          ; Debug Monitor Handler
 +
                DCD    0                        ; Reserved
 +
                DCD    PendSV_Handler            ; PendSV Handler
 +
                DCD    SysTick_Handler          ; SysTick Handler
 +
 +
                ; External Interrupts
 +
                DCD    WWDG_IRQHandler          ;  0: Window Watchdog
 +
                DCD    PVD_IRQHandler            ;  1: PVD through EXTI Line detect
 +
                DCD    TAMPER_IRQHandler        ;  2: Tamper
 +
                DCD    RTC_IRQHandler            ;  3: RTC
 +
                DCD    FLASH_IRQHandler          ;  4: Flash
 +
                DCD    RCC_IRQHandler            ;  5: RCC
 +
                DCD    EXTI0_IRQHandler          ;  6: EXTI Line 0
 +
                DCD    EXTI1_IRQHandler          ;  7: EXTI Line 1
 +
                DCD    EXTI2_IRQHandler          ;  8: EXTI Line 2
 +
                DCD    EXTI3_IRQHandler          ;  9: EXTI Line 3
 +
                DCD    EXTI4_IRQHandler          ; 10: EXTI Line 4
 +
                DCD    DMA1_Channel1_IRQHandler  ; 11: DMA1 Channel 1
 +
                DCD    DMA1_Channel2_IRQHandler  ; 12: DMA1 Channel 2
 +
                DCD    DMA1_Channel3_IRQHandler  ; 13: DMA1 Channel 3
 +
                DCD    DMA1_Channel4_IRQHandler  ; 14: DMA1 Channel 4
 +
                DCD    DMA1_Channel5_IRQHandler  ; 15: DMA1 Channel 5
 +
                DCD    DMA1_Channel6_IRQHandler  ; 16: DMA1 Channel 6
 +
                DCD    DMA1_Channel7_IRQHandler  ; 17: DMA1 Channel 7
 +
                DCD    ADC1_2_IRQHandler        ; 18: ADC1 and ADC2
 +
                DCD    CAN1_TX_IRQHandler        ; 19: CAN1 TX
 +
                DCD    CAN1_RX0_IRQHandler      ; 20: CAN1 RX0
 +
                DCD    CAN1_RX1_IRQHandler      ; 21: CAN1 RX1
 +
                DCD    CAN1_SCE_IRQHandler      ; 22: CAN1 SCE
 +
                DCD    EXTI9_5_IRQHandler        ; 23: EXTI Line 9..5
 +
                DCD    TIM1_BRK_IRQHandler      ; 24: TIM1 Break
 +
                DCD    TIM1_UP_IRQHandler        ; 25: TIM1 Update
 +
                DCD    TIM1_TRG_COM_IRQHandler  ; 26: TIM1 Trigger and Commutation
 +
                DCD    TIM1_CC_IRQHandler        ; 27: TIM1 Capture Compare
 +
                DCD    TIM2_IRQHandler          ; 28: TIM2
 +
                DCD    TIM3_IRQHandler          ; 29: TIM3
 +
                DCD    TIM4_IRQHandler          ; 30: TIM4
 +
                DCD    I2C1_EV_IRQHandler        ; 31: I2C1 Event
 +
                DCD    I2C1_ER_IRQHandler        ; 32: I2C1 Error
 +
                DCD    I2C2_EV_IRQHandler        ; 33: I2C2 Event
 +
                DCD    I2C2_ER_IRQHandler        ; 34: I2C2 Error
 +
                DCD    SPI1_IRQHandler          ; 35: SPI1
 +
                DCD    SPI2_IRQHandler          ; 36: SPI2
 +
                DCD    USART1_IRQHandler        ; 37: USART1
 +
                DCD    USART2_IRQHandler        ; 38: USART2
 +
                DCD    USART3_IRQHandler        ; 39: USART3
 +
                DCD    EXTI15_10_IRQHandler      ; 40: EXTI Line 15..10
 +
                DCD    RTCAlarm_IRQHandler      ; 41: RTC Alarm through EXTI Line
 +
                DCD    OTG_FS_WKUP_IRQHandler    ; 42: USB OTG FS Wakeup
 +
                DCD    Default_Handler          ; 43: Reserved
 +
                DCD    Default_Handler          ; 44: Reserved
 +
                DCD    Default_Handler          ; 45: Reserved
 +
                DCD    Default_Handler          ; 46: Reserved
 +
                DCD    Default_Handler          ; 47: Reserved
 +
                DCD    Default_Handler          ; 48: Reserved
 +
                DCD    Default_Handler          ; 49: Reserved
 +
                DCD    TIM5_IRQHandler          ; 50: TIM5
 +
                DCD    SPI3_IRQHandler          ; 51: SPI3
 +
                DCD    UART4_IRQHandler          ; 52: UART4
 +
                DCD    UART5_IRQHandler          ; 53: UART5
 +
                DCD    TIM6_IRQHandler          ; 54: TIM6
 +
                DCD    TIM7_IRQHandler          ; 55: TIM7
 +
                DCD    DMA2_Channel1_IRQHandler  ; 56: DMA2 Channel 1
 +
                DCD    DMA2_Channel2_IRQHandler  ; 57: DMA2 Channel 2
 +
                DCD    DMA2_Channel3_IRQHandler  ; 58: DMA2 Channel 3
 +
                DCD    DMA2_Channel4_IRQHandler  ; 59: DMA2 Channel 4
 +
                DCD    DMA2_Channel5_IRQHandler  ; 60: DMA2 Channel 5
 +
                DCD    ETH_IRQHandler            ; 61: Ethernet
 +
                DCD    ETH_WKUP_IRQHandler      ; 62: Ethernet Wakeup
 +
                DCD    CAN2_TX_IRQHandler        ; 63: CAN2 TX
 +
                DCD    CAN2_RX0_IRQHandler      ; 64: CAN2 RX0
 +
                DCD    CAN2_RX1_IRQHandler      ; 65: CAN2 RX1
 +
                DCD    CAN2_SCE_IRQHandler      ; 66: CAN2 SCE
 +
                DCD    OTG_FS_IRQHandler        ; 67: USB On-The-Go FS
 +
__Vectors_End
 +
 +
__Vectors_Size EQU __Vectors_End - __Vectors
 +
 +
                AREA    |.text|, CODE, READONLY
 +
 +
 +
; Reset Handler
 +
 +
Reset_Handler  PROC
 +
                EXPORT  Reset_Handler            [WEAK]
 +
                IMPORT  __main
 +
                LDR    R0, =__main              ; Jump to main()
 +
                BX      R0
 +
                ENDP
 +
 +
 +
; Dummy Exception Handlers (infinite loops which can be modified)
 +
 +
NMI_Handler    PROC
 +
                EXPORT  NMI_Handler              [WEAK]
 +
                B      .                              ; B . means Branch to this address
 +
                ENDP
 +
</source>
 
[[Category:STM32F107VC]][[Category:ARM]]
 
[[Category:STM32F107VC]][[Category:ARM]]

Latest revision as of 07:52, 24 September 2011

Nested vectored interrupt controller (NVIC)

Features

  • 68 (not including the sixteen Cortex™-M3 interrupt lines)
  • 16 programmable priority levels (4 bits of interrupt priority are used)
  • Low-latency exception and interrupt handling
  • Power management control
  • Implementation of System Control Registers

Example using USART2 interrupt

From the Reference manual table 61 in section 10.1.2 its seen that

USART2 global interrupt
Position: 28
Priority: 45 - Settable
Address: 0x0000_00D8

Default Setup

The default Keil uVision STM32F107VC startup file startup_stm32f10x_cl.s contains the startup code and the Interrupt entries. Partial config below. 

Stack_Size      EQU     0x00000200

                AREA    STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem       SPACE   Stack_Size
__initial_sp
                AREA    RESET, DATA, READONLY
                EXPORT  __Vectors
                EXPORT  __Vectors_End
                EXPORT  __Vectors_Size

__Vectors       DCD     __initial_sp              ; Top of Stack  (Linker puts top-of-stack address in location 0x00000000)
                DCD     Reset_Handler             ; Reset Handler (Vector address of Reset. The PC - Program Counter - loads this address on Reset
                DCD     NMI_Handler               ; NMI Handler
                DCD     HardFault_Handler         ; Hard Fault Handler
                DCD     MemManage_Handler         ; MPU Fault Handler
                DCD     BusFault_Handler          ; Bus Fault Handler
                DCD     UsageFault_Handler        ; Usage Fault Handler
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     0                         ; Reserved
                DCD     SVC_Handler               ; SVCall Handler
                DCD     DebugMon_Handler          ; Debug Monitor Handler
                DCD     0                         ; Reserved
                DCD     PendSV_Handler            ; PendSV Handler
                DCD     SysTick_Handler           ; SysTick Handler

                ; External Interrupts
                DCD     WWDG_IRQHandler           ;  0: Window Watchdog
                DCD     PVD_IRQHandler            ;  1: PVD through EXTI Line detect
                DCD     TAMPER_IRQHandler         ;  2: Tamper
                DCD     RTC_IRQHandler            ;  3: RTC
                DCD     FLASH_IRQHandler          ;  4: Flash
                DCD     RCC_IRQHandler            ;  5: RCC
                DCD     EXTI0_IRQHandler          ;  6: EXTI Line 0
                DCD     EXTI1_IRQHandler          ;  7: EXTI Line 1
                DCD     EXTI2_IRQHandler          ;  8: EXTI Line 2
                DCD     EXTI3_IRQHandler          ;  9: EXTI Line 3
                DCD     EXTI4_IRQHandler          ; 10: EXTI Line 4
                DCD     DMA1_Channel1_IRQHandler  ; 11: DMA1 Channel 1
                DCD     DMA1_Channel2_IRQHandler  ; 12: DMA1 Channel 2
                DCD     DMA1_Channel3_IRQHandler  ; 13: DMA1 Channel 3
                DCD     DMA1_Channel4_IRQHandler  ; 14: DMA1 Channel 4
                DCD     DMA1_Channel5_IRQHandler  ; 15: DMA1 Channel 5
                DCD     DMA1_Channel6_IRQHandler  ; 16: DMA1 Channel 6
                DCD     DMA1_Channel7_IRQHandler  ; 17: DMA1 Channel 7
                DCD     ADC1_2_IRQHandler         ; 18: ADC1 and ADC2
                DCD     CAN1_TX_IRQHandler        ; 19: CAN1 TX
                DCD     CAN1_RX0_IRQHandler       ; 20: CAN1 RX0
                DCD     CAN1_RX1_IRQHandler       ; 21: CAN1 RX1
                DCD     CAN1_SCE_IRQHandler       ; 22: CAN1 SCE
                DCD     EXTI9_5_IRQHandler        ; 23: EXTI Line 9..5
                DCD     TIM1_BRK_IRQHandler       ; 24: TIM1 Break
                DCD     TIM1_UP_IRQHandler        ; 25: TIM1 Update
                DCD     TIM1_TRG_COM_IRQHandler   ; 26: TIM1 Trigger and Commutation
                DCD     TIM1_CC_IRQHandler        ; 27: TIM1 Capture Compare
                DCD     TIM2_IRQHandler           ; 28: TIM2
                DCD     TIM3_IRQHandler           ; 29: TIM3
                DCD     TIM4_IRQHandler           ; 30: TIM4
                DCD     I2C1_EV_IRQHandler        ; 31: I2C1 Event
                DCD     I2C1_ER_IRQHandler        ; 32: I2C1 Error
                DCD     I2C2_EV_IRQHandler        ; 33: I2C2 Event
                DCD     I2C2_ER_IRQHandler        ; 34: I2C2 Error
                DCD     SPI1_IRQHandler           ; 35: SPI1
                DCD     SPI2_IRQHandler           ; 36: SPI2
                DCD     USART1_IRQHandler         ; 37: USART1
                DCD     USART2_IRQHandler         ; 38: USART2
                DCD     USART3_IRQHandler         ; 39: USART3
                DCD     EXTI15_10_IRQHandler      ; 40: EXTI Line 15..10
                DCD     RTCAlarm_IRQHandler       ; 41: RTC Alarm through EXTI Line
                DCD     OTG_FS_WKUP_IRQHandler    ; 42: USB OTG FS Wakeup
                DCD     Default_Handler           ; 43: Reserved
                DCD     Default_Handler           ; 44: Reserved
                DCD     Default_Handler           ; 45: Reserved
                DCD     Default_Handler           ; 46: Reserved
                DCD     Default_Handler           ; 47: Reserved
                DCD     Default_Handler           ; 48: Reserved
                DCD     Default_Handler           ; 49: Reserved
                DCD     TIM5_IRQHandler           ; 50: TIM5
                DCD     SPI3_IRQHandler           ; 51: SPI3
                DCD     UART4_IRQHandler          ; 52: UART4
                DCD     UART5_IRQHandler          ; 53: UART5
                DCD     TIM6_IRQHandler           ; 54: TIM6
                DCD     TIM7_IRQHandler           ; 55: TIM7
                DCD     DMA2_Channel1_IRQHandler  ; 56: DMA2 Channel 1
                DCD     DMA2_Channel2_IRQHandler  ; 57: DMA2 Channel 2
                DCD     DMA2_Channel3_IRQHandler  ; 58: DMA2 Channel 3
                DCD     DMA2_Channel4_IRQHandler  ; 59: DMA2 Channel 4
                DCD     DMA2_Channel5_IRQHandler  ; 60: DMA2 Channel 5
                DCD     ETH_IRQHandler            ; 61: Ethernet
                DCD     ETH_WKUP_IRQHandler       ; 62: Ethernet Wakeup
                DCD     CAN2_TX_IRQHandler        ; 63: CAN2 TX
                DCD     CAN2_RX0_IRQHandler       ; 64: CAN2 RX0
                DCD     CAN2_RX1_IRQHandler       ; 65: CAN2 RX1
                DCD     CAN2_SCE_IRQHandler       ; 66: CAN2 SCE
                DCD     OTG_FS_IRQHandler         ; 67: USB On-The-Go FS
__Vectors_End

__Vectors_Size 	EQU 	__Vectors_End - __Vectors

                AREA    |.text|, CODE, READONLY


; Reset Handler

Reset_Handler   PROC
                EXPORT  Reset_Handler             [WEAK]
                IMPORT  __main
                LDR     R0, =__main              ; Jump to main()
                BX      R0
                ENDP


; Dummy Exception Handlers (infinite loops which can be modified)

NMI_Handler     PROC
                EXPORT  NMI_Handler               [WEAK]
                B       .                               ; B . means Branch to this address
                ENDP
Retrieved from "http://mars.merhot.dk/w/index.php?title=STM32F107VC/Interrupts_and_Events&oldid=19611"