Difference between revisions of "FPGA"

Revision as of 16:30, 16 October 2010

Linkene her under kan der købes eval bords!!!

@@ Line 15: / Line 15: @@
 **[[Media:Tidsmaaler_uden_logik.zip|Tidsmåler!! uden logik og med 100Hz clk]] (Loads ZIP file)
 **[[Media:Digital.pdf|Digital logik]] (Loads ZIP file)
-I have one method of using a counter. The formula for calculating the counter is ( Actual Frequency / required frequency)
-use that as the set point for your counter and make use of this code(This IS for 26MHz from 100MHz clock, so the Count value WilL be(100m/26M = 3.)
-*if (clock = '1' and clock'event ) then
-*&nbsp;&nbsp;&nbsp;&nbsp; if ( count /= 4)
-*&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; count&nbsp;:= count + 1&nbsp;;
-*&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; clock_out&nbsp;:= clock_out&nbsp;;
-*&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; else
-*&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; count&nbsp;:= 0&nbsp;;
-*&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; clock_out&nbsp;:= not clock_out&nbsp;;
-*&nbsp;&nbsp;&nbsp; end if;
-*end if&nbsp;;
-so for 13MHz the count value will be 7
 *Opgaver