STM32F107VC/Bit-banding

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Revision as of 15:59, 27 January 2012 by Heth (talk | contribs) (Created page with "=Problem= WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to...")
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Problem

WHen writing to memory addresses that are shared with multiple processes/tasks - the normal Read-Modify-Write solution can cause problems if another task i scheduled to run before the Read-Modify-Write cycle is finished and the new task makes its own Read-Modify-Write on the same shared address.

This problem could occur in the configuration Registers of Peripheral - fx. Timers, Interrupt Controllers.

Example

The Timer Enable Register (TER) at address 0x4001 is used to enable Timer 1 and Timer 2.

Timer enable Register (TER).
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
X X X X X 1 = Enable Timer 2
0 = Disable Timer 2
1 = Enable Timer 1
0 = Disable Timer 1
X

Timer 1 is used by Task A and Timer 2 is used by Task B.

Example of problem.
Action TER at 0x4001
Task A Reads TER !!